Cal Poly Pomona · RSCL Research Lab · 2025
The LHS-1140b Subdrone is a dual-environment vehicle capable of both flight and underwater operation, designed for planetary exploration research. The system integrates flight control, buoyancy regulation, and telemetry through a unified embedded stack built around the Kakute H7 (65 A) flight controller and a custom Timed Automated Dive System (TADS) implemented on an ESP32.
The drone’s ballast system uses dual diaphragm pumps and a silicone bladder to modulate buoyancy within ±5%, enabling controlled descent and ascent. Flight propulsion relies on four 50 mm Electric Ducted Fans (EDFs) tuned for underwater startup torque and cavitation mitigation. The waterproof chassis combines carbon-fiber plates and 3D-printed PLA-CF parts with sealed enclosures for electronics and pumps.
System validation included pool testing, power-bus current monitoring, and firmware stress-tests via Mission Planner. Data from oscilloscope and thermal-camera sessions guided thermal relief and isolation improvements. The project demonstrated stable flight-to-water transition and is now informing RSCL’s NASA MINDS-affiliated amphibious robotics research.
Independent Project · Audio-Centric Embedded System · 2025
This project involved the end-to-end design of a 4-layer mixed-signal PCB for high-fidelity audio acquisition and playback. The system integrates a 14-bit SAR ADC and precision DAC within a unified analog and digital architecture. The signal chain includes anti-aliasing and anti-imaging Butterworth filters, differential and single-ended paths, and low-noise op-amp stages designed for clean phase response and low distortion. Emphasis was placed on impedance matching, domain isolation, and noise performance, resulting in a layout that cleanly separates analog and digital sections while maintaining short, low-impedance return paths.
Power delivery was designed around a buck–LDO regulation chain, combining high-efficiency conversion with low-noise linear regulation for sensitive analog circuitry. Each stage was calculated and simulated in LTspice to verify transient response and filter cutoff behavior. Decoupling and bypass capacitor networks were optimized per IC requirements to suppress ripple and stabilize reference rails. The 4-layer stack-up was organized to ensure robust ground return and consistent impedance across signal and power planes, minimizing coupling between the converter, controller, and analog front-end.
The next phase of the project focuses on DSP firmware development in STM32CubeIDE, implementing real-time audio algorithms for a distortion pedal emulating the Ibanez Tube Screamer. The hardware is currently in the production planning stage, with options being evaluated between PCBA manufacturing and manual PCB assembly with hand-soldered precision components.
Independent Project · Microcontroller Board Design · 2023
This project was my first end-to-end PCB design, created to familiarize myself with microcontroller hardware implementation and design-for-manufacturability practices. The board integrates an STM32F103C8T6 MCU, external 16 MHz crystal oscillator, AMS1117-3.3 V regulator, and USB interface for programming and power. I designed the schematic and layout entirely in KiCad, following best practices for decoupling, ferrite bead filtering on VDDA, and SWD/debug header routing.
The design process helped me build foundational skills in signal routing, impedance awareness, and schematic organization. I applied ERC/DRC verification, learned to generate Gerber and pick-and-place files, and gained practical experience with crystal load capacitance matching for stable oscillation. This board laid the groundwork for later mixed-signal and embedded system designs.
Check out more of my projects and source code on my GitHub repository:
My GitHub Repository
RP2040 + SPI design that records and plays back short audio clips with a single-button UX. The system samples at 8 kHz and stores ~40 seconds across four slots in external SPI flash, with debounced input and simple LED status feedback. I implemented low-power sleep and a circular-buffer style capture path so the UI feels instant while keeping the firmware compact.
PIC18F4321 node that measures temp/humidity/solar/wind and computes WBGT heat-stress risk on an LCD UI. All math is fixed-point to stay fast and deterministic on an 8-bit MCU, with calibration routines for the sensors and display. The project includes a compact menu system and data-smoothing to keep the readout stable in changing conditions.
Built a Pong clone on a Nexys A-7 with hand-written Verilog for 640×480@60 Hz VGA timing. Paddle/ball logic, collision detection, and scoring are implemented as clean finite-state machines with hardware button debouncing. The design synthesizes in Vivado and demonstrates a full pixel pipeline from sync generation to on-screen sprites.
Fabricated a custom mini-chopper: frame, triple-tree, bars, and seat with iterative welding and fit-up. Integrated the battery pack and electrical system, routing power safely and packaging components for serviceability. The build emphasized fixture setup, alignment checks, and progressive test rides to validate geometry and ergonomics.
A tiny reverse-mode autodiff engine to learn backprop from first principles. Implements a scalar computation graph with topological ordering, gradient checks, and a minimal MLP. Trains small models end-to-end and exposes the mechanics of autodiff without depending on large frameworks.
Deployed a Raspberry Pi (Zero 2 W) as a network-wide DNS/DHCP server using Pi-hole for ad and tracker blocking.
Reconfigured an AT&T BGW gateway by disabling its DHCP and handing leases to the Pi, added Cloudflare upstream resolvers, and verified IPv4/IPv6 behavior.
Built reliability into the setup with static IP reservation, upstream redundancy, and client-side tests using nslookup, while maintaining seamless home connectivity.