GitHub (public repos & pinned projects):
github.com/danromero1Cal Poly Pomona · RSCL Research Lab · 2025
The LHS-1140b Subdrone is a dual-environment vehicle capable of both flight and underwater operation, designed for planetary exploration research. The system integrates flight control, buoyancy regulation, and telemetry through a unified embedded stack built around the Kakute H7 (65 A) flight controller and a custom Timed Automated Dive System (TADS) implemented on an ESP32.
The drone’s ballast system uses dual diaphragm pumps and a silicone bladder to modulate buoyancy within ±5%, enabling controlled descent and ascent. Flight propulsion relies on four 50 mm Electric Ducted Fans (EDFs) tuned for underwater startup torque and cavitation mitigation. The waterproof chassis combines carbon-fiber plates and 3D-printed PLA-CF parts with sealed enclosures for electronics and pumps.
System validation included pool testing, power-bus current monitoring, and firmware stress-tests via Mission Planner. Data from oscilloscope and thermal-camera sessions guided thermal relief and isolation improvements. The project demonstrated stable flight-to-water transition and is now informing RSCL’s NASA MINDS-affiliated amphibious robotics research.
Independent Project · Embedded Audio Systems · 2025–Present
This project is the end-to-end design and bring-up of a custom 4-layer mixed-signal embedded platform for real-time audio acquisition, digital signal processing, and playback. The system interfaces an external high-resolution ADC and DAC with an STM32 microcontroller to implement a standalone programmable guitar effects pedal operating without a host PC.
The analog front end provides a high-impedance guitar input stage, precision biasing, and a 3rd-order Butterworth anti-aliasing filter to condition signals prior to conversion. Reconstruction filtering and low-noise buffering are used on the output path to suppress imaging artifacts and maintain low distortion across the audible band. The PCB stack-up and layout emphasize controlled return paths, analog-digital domain isolation, low-impedance grounding, and consistent impedance to minimize coupling between sensitive analog circuitry and high-speed digital switching.
Power delivery is implemented using a USB-C input feeding a multi-rail regulation architecture to support low-noise analog supplies and regulated digital rails. All power stages and filter networks were simulated and verified in LTspice prior to layout. Decoupling and bypass networks were optimized for each device to ensure supply stability under dynamic load conditions.
Firmware development focuses on bare-metal real-time audio processing using timer-triggered ADC sampling, DMA-based double buffering, and deterministic interrupt scheduling in STM32CubeIDE. Digital signal processing algorithms—including soft-clipping distortion, equalization, and filtering—are implemented in C using the CMSIS-DSP library on a Cortex-M4 FPU platform. The system targets a 48 kHz sample rate with sub-5 ms end-to-end latency to preserve instrument responsiveness.
This platform serves as a practical environment for developing embedded firmware architecture, hardware-software co-design, signal integrity practices, and real-time performance analysis while producing a functional guitar effects processor from schematic to working prototype.
Independent Project · Microcontroller Board Design · 2023
This project was my first end-to-end PCB design, created to familiarize myself with microcontroller hardware implementation and design-for-manufacturability practices. The board integrates an STM32F103C8T6 MCU, external 16 MHz crystal oscillator, AMS1117-3.3 V regulator, and USB interface for programming and power. I designed the schematic and layout entirely in KiCad, following best practices for decoupling, ferrite bead filtering on VDDA, and SWD/debug header routing.
The design process helped me build foundational skills in signal routing, impedance awareness, and schematic organization. I applied ERC/DRC verification, learned to generate Gerber and pick-and-place files, and gained practical experience with crystal load capacitance matching for stable oscillation. This board laid the groundwork for later mixed-signal and embedded system designs.
RP2040 + SPI design that records and plays back short audio clips with a single-button UX. The system samples at 8 kHz and stores ~40 seconds across four slots in external SPI flash, with debounced input and simple LED status feedback. I implemented low-power sleep and a circular-buffer style capture path so the UI feels instant while keeping the firmware compact.
PIC18F4321 node that measures temp/humidity/solar/wind and computes WBGT heat-stress risk on an LCD UI. All math is fixed-point to stay fast and deterministic on an 8-bit MCU, with calibration routines for the sensors and display. The project includes a compact menu system and data-smoothing to keep the readout stable in changing conditions.
Built a Pong clone on a Nexys A-7 with hand-written Verilog for 640×480@60 Hz VGA timing. Paddle/ball logic, collision detection, and scoring are implemented as clean finite-state machines with hardware button debouncing. The design synthesizes in Vivado and demonstrates a full pixel pipeline from sync generation to on-screen sprites.
Fabricated a custom mini-chopper: frame, triple-tree, bars, and seat with iterative welding and fit-up. Integrated the battery pack and electrical system, routing power safely and packaging components for serviceability. The build emphasized fixture setup, alignment checks, and progressive test rides to validate geometry and ergonomics.
A tiny reverse-mode autodiff engine to learn backprop from first principles. Implements a scalar computation graph with topological ordering, gradient checks, and a minimal MLP. Trains small models end-to-end and exposes the mechanics of autodiff without depending on large frameworks.
Deployed a Raspberry Pi (Zero 2 W) as a network-wide DNS/DHCP server using Pi-hole for ad and tracker blocking.
Reconfigured an AT&T BGW gateway by disabling its DHCP and handing leases to the Pi, added Cloudflare upstream resolvers, and verified IPv4/IPv6 behavior.
Built reliability into the setup with static IP reservation, upstream redundancy, and client-side tests using nslookup, while maintaining seamless home connectivity.